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ES&IS: Enhanced Spread and Iterative Search hardware-friendly motion estimation algorithm for the HEVC Standard.

, , , and . ICECS, page 941-944. IEEE, (2013)

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Memory-Aware and High-Throughput Hardware Design for the HEVC Fractional Motion Estimation., , , , , and . SBCCI, page 11:1-11:6. ACM, (2015)A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding., , , and . ISCAS, page 1-4. IEEE, (2017)High throughput hardware design for the HEVC Fractional Motion Estimation Interpolation Unit., , , , , and . ICECS, page 161-164. IEEE, (2013)An energy-efficient hardware design for lossless reference frame compression in video coders., , , , , and . ICECS, page 573-576. IEEE, (2013)Memory energy consumption reduction in video coding systems., , , , , and . LASCAS, page 1-4. IEEE, (2014)An efficient reference frame compression approach for video coding systems., , , , , and . LASCAS, page 1-4. IEEE, (2014)Hardware design of fast HEVC 2-D IDCT targeting real-time UHD 4K applications., , , , and . LASCAS, page 1-4. IEEE, (2015)Energy-efficient motion estimation with approximate arithmetic., , , , , and . MMSP, page 1-6. IEEE, (2017)High-Throughput CDEF Architecture for the AV1 Decoder Targeting 4K@60fps Videos., , , , and . LASCAS, page 1-4. IEEE, (2020)Residual Syntax Elements Analysis and Design Targeting High-Throughput HEVC CABAC., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (2): 475-488 (2020)