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A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.

X. Jia, H. Zhu, Y. Wang, J. Zhang, F. Lin, X. Xiong, D. Xu, C. Chen, and Q. Liu. ISCAS, page 2816-2820. IEEE, (2022)

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Junjiang Zhu

Yiping Zhu

Yongming Zhu

Changbao Zhu

Zhu Dai

Other publications of authors with the same name

OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators.C. Chen, H. Ding, H. Peng, H. Zhu, Y. Wang, and C. Shi. IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (3): 519-530 (2018)A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.X. Jia, H. Zhu, Y. Wang, J. Zhang, F. Lin, X. Xiong, D. Xu, C. Chen, and Q. Liu. ISCAS, page 2816-2820. IEEE, (2022)An Efficient Markov Random Field Based Denoising Approach for Dynamic Vision Sensor.X. Cheng, H. Zhu, J. Liu, M. Wang, and X. Zeng. ASICON, page 1-4. IEEE, (2021)A $2.53 W/channel$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros.H. Jiang, J. Zheng, Y. Wang, J. Zhang, H. Zhu, L. Lyu, Y. Chen, C. Chen, and Q. Liu. ISCAS, page 1-5. IEEE, (2023)FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer.B. Jiao, L. Xu, X. Yu, H. Yang, H. Zhu, Y. Wang, J. Zhu, D. Wen, L. Wang, J. Tao and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 71 (9): 4156-4168 (September 2024)ARCTIC: Agile and Robust Compute-In-Memory Compiler with Parameterized INT/FP Precision and Built-In Self Test.H. Zhang, H. Zhu, S. He, M. Li, C. Wang, X. Xiong, H. Tian, X. Zeng, and C. Chen. DATE, page 1-6. IEEE, (2024)Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture.H. Zhu, Y. Wang, and C. Shi. IEEE Des. Test, 37 (1): 56-63 (2020)A 0.57-GOPS/DSP Object Detection PIM Accelerator on FPGA.B. Jiao, J. Zhang, Y. Xie, S. Wang, H. Zhu, X. Kang, Z. Dong, L. Zhang, and C. Chen. ASP-DAC, page 13-14. ACM, (2021)Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation.S. He, H. Zhang, M. Li, H. Zhu, C. Chen, Q. Liu, and X. Zeng. AICAS, page 1-5. IEEE, (2023)TRPN: Matrix Factorization Meets Recurrent Neural Network for Temporal Rating Prediction.H. Zhu, Y. Shen, and X. Zhou. APWeb/WAIM (2), volume 11642 of Lecture Notes in Computer Science, page 57-72. Springer, (2019)

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Disambiguation of "Zhu, Haozhe"

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A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.

Please choose a person to relate this publication to

Junjiang Zhu

Yiping Zhu

Yongming Zhu

Changbao Zhu

Zhu Dai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhu, Haozhe"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.

Please choose a person to relate this publication to

Junjiang Zhu

Yiping Zhu

Yongming Zhu

Changbao Zhu

Zhu Dai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.