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Disambiguation of "Fujiwara, Hideo"

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Area Overhead and Test Time Co-Optimization through NoC Bandwidth Sharing.

, , and . ATS, page 459-462. IEEE, (2007)

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Esther Fujiwara

Hideo Baba

Hideo Ohashi

Hideo Andreas Baba

Hideo Ikezawa-Hanada

 

Other publications of authors with the same name

Implementing a Built-In Self-Test PLA Design., , and . IEEE Des. Test, 2 (2): 37-48 (1985)Test research in Japan., , , , , and . IEEE Des. Test, 5 (5): 60-79 (1988)Non-scan design for testable data paths using thru operation., , , and . Syst. Comput. Jpn., 28 (10): 60-68 (1997)A random-pattern testable design for programmable logic arrays.. Syst. Comput. Jpn., 18 (7): 95-102 (1987)The Complexity of Fault Detection Problems for Combinational Logic Circuits., and . IEEE Trans. Computers, 31 (6): 555-560 (1982)Brief Announcement: Acceleration by Contention for Shared Memory Mutual Exclusion Algorithms., , and . DISC, volume 5805 of Lecture Notes in Computer Science, page 172-173. Springer, (2009)Optimal Wait-Free Clock Synchronisation Protocol on a Shared-Memory Multi-processor System., , , and . WDAG, volume 1320 of Lecture Notes in Computer Science, page 290-304. Springer, (1997)A Test Generation Method Based on k-Cycle Testing for Finite State Machines., , and . IOLTS, page 232-235. IEEE, (2019)Fast false path identification based on functional unsensitizability using RTL information., , , and . ASP-DAC, page 660-665. IEEE, (2009)Secure scan design using shift register equivalents against differential behavior attack., , and . ASP-DAC, page 818-823. IEEE, (2011)