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A 32-Gb/s Dual-Mode Transceiver With One-Tap FIR and Two-Tap IIR RX Only Equalization in 65-nm CMOS Technology., , и . IEEE Trans. Very Large Scale Integr. Syst., 29 (8): 1567-1574 (2021)A 90.2% Peak Efficiency Multi-Input Single-Inductor Multi-Output Energy Harvesting Interface With Double-Conversion Rejection Technique and Buck-Based Dual-Conversion Mode., , , , , и . IEEE J. Solid State Circuits, 56 (3): 961-971 (2021)A 25 Gb/s Wireline Receiver With Feedforward and Feedback Equalizers at Analog Front-End., , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (2): 404-408 (2022)A 16-Gb/s NRZ Receiver With 0.0019-pJ/bit/dB 1-Tap Charge-Redistribution DFE., , , , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 904-908 (марта 2023)A 7ps-Jitter 0.053mm2 Fast-Lock ADDLL with Wide-Range and High-Resolution All-Digital DCC., , , , , и . ISSCC, стр. 184-595. IEEE, (2007)An on-chip soft-start technique of current-mode DC-DC converter for biomedical applications., , , и . APCCAS, стр. 500-503. IEEE, (2010)A 32 Gb/s Rx only equalization transceiver with 1-tap speculative FIR and 2-tap direct IIR DFE., , , и . VLSI Circuits, стр. 1-2. IEEE, (2016)Effect of Providing a Web-Based Collaboration Medium for Remote Customer Troubleshooting Tasks., , , и . HCI (9), том 4558 из Lecture Notes in Computer Science, стр. 47-53. Springer, (2007)Low Power Cache with Successive Tag Comparison Algorithm., , , и . PATMOS, том 2799 из Lecture Notes in Computer Science, стр. 599-606. Springer, (2003)A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time., , , и . IEEE Trans. Very Large Scale Integr. Syst., 17 (10): 1461-1469 (2009)