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Reasoning in Boolean Networks - Logic Synthesis and Verification Using Testing Techniques., and . Frontiers in electronic testing Springer, (1997)goSAT: Floating-point satisfiability as global optimization., , and . FMCAD, page 11-14. IEEE, (2017)Formal hardware/software co-verification by interval property checking with abstraction., , , and . DAC, page 510-515. ACM, (2011)The European Masters in Embedded Computing Systems (EMECS)., , , and . EWME, page 1-6. IEEE, (2016)Automatic State Space Analysis for Modeling Untrusted Embedded Device Drivers., , , and . DSD, page 109-116. IEEE, (2020)Accelerated dynamic learning for test pattern generation in combinational circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (5): 684-694 (1993)A New Formal Verification Approach for Hardware-dependent Embedded System Software., , , , , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2013)Area Estimation Framework for Digital Hardware Design using Machine Learning., , , , , and . MBMV, page 1-10. VDE / IEEE, (2020)A computer-algebraic approach to formal verification of data-centric low-level software., , , and . MEMOCODE, page 34-42. IEEE, (2016)A property language for the specification of hardware-dependent embedded system software., , , , and . FDL, page 1-8. IEEE, (2014)