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A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits.

, , , and . ICECS, page 852-855. IEEE, (2009)

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Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits., , , and . ICECS, page 399-402. IEEE, (2006)An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias., , , and . VLSI-SoC, page 128-133. IEEE, (2006)A mathematical model to compute makespan for application integration processes using graph theory approach., , , and . Int. J. Comput. Appl. Technol., 69 (3): 193-205 (2022)Collaborative Design Using a Shared Object Spaces Infrastructure., , , and . SBCCI, page 163-168. IEEE Computer Society, (2002)On the Use of Blockchain Technology to Improve the Reproducibility of Preclinical Research Experiments., , , , , and . ICEIS (1), page 173-179. SCITEPRESS, (2023)Cloud Configuration Modelling: A Literature Review from an Application Integration Deployment Perspective., , , and . CENTERIS/ProjMAN/HCist, volume 64 of Procedia Computer Science, page 977-983. Elsevier, (2015)A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits., , , and . ICECS, page 852-855. IEEE, (2009)Using timed and coloured Petri nets for modelling, simulation, and analysis of integration solutions., , , and . Int. J. Web Eng. Technol., 14 (3): 231-254 (2019)Selecting services in the cloud: a decision support methodology focused on infrastructure-as-a-service context., , , , and . J. Supercomput., 78 (6): 7825-7860 (2022)Advances in a DSL to Specify Smart Contracts for Application Integration Processes., , , , , , , and . CIBSE, page 46-60. Curran Associates, (2022)