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Designing Robust Asynchronous Circuits Based on FinFET Technology.

, , and . DSD, page 401-408. IEEE Computer Society, (2011)

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Architecture Support for Tightly-Coupled Multi-Core Clusters with Shared-Memory HW Accelerators., , , , , and . IEEE Trans. Computers, 64 (8): 2132-2144 (2015)Modeling symmetrical independent gate FinFET using predictive technology model., , , , and . ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2013)CMV: Clustered Majority Voting Reliability-Aware Task Scheduling for Multicore Real-Time Systems., , and . IEEE Trans. Reliability, 68 (1): 187-200 (2019)A tightly-coupled multi-core cluster with shared-memory HW accelerators., , , , , and . ICSAMOS, page 96-103. IEEE, (2012)Functional Test-Case Generation by a Control Transaction Graph for TLM Verification., , and . DSD, page 157-164. IEEE Computer Society, (2007)A dual mode EPC Gen 2 UHF RFID transponder in 0.18μm CMOS., , , , and . ICECS, page 1135-1138. IEEE, (2008)Low-distance path-based multicast routing algorithm for network-on-chips., , , and . IET Comput. Digit. Tech., 3 (5): 430-442 (2009)Prediction-based underutilized and destination host selection approaches for energy-efficient dynamic VM consolidation in data centers., and . J. Supercomput., 76 (12): 10240-10257 (2020)Graph based test case generation for TLM functional verification., , and . Microprocess. Microsystems, 32 (5-6): 288-295 (2008)Clustering Effects on the Design of Opto-Electrical Network-on-Chip., , and . PDP, page 427-430. IEEE Computer Society, (2016)