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Disambiguation of "Narayanan, Vijaykrishnan"

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Monolithic-3D Integration Augmented Design Techniques for Computing in SRAMs.

, , , , , and . ISCAS, page 1-5. IEEE, (2019)

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P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

 

Other publications of authors with the same name

Width minimization in the Single-Electron Transistor array synthesis., , , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)A task-oriented vision system., , , , and . ACM Great Lakes Symposium on VLSI, page 181-186. ACM, (2014)A comparative study of power efficient SRAM designs., , and . ACM Great Lakes Symposium on VLSI, page 117-122. ACM, (2000)Noise Aware Power Adaptive Partitioned Deep Networks for Mobile Visual Assist Platforms., , and . SoCC, page 186-191. IEEE, (2018)Using complete system simulation to characterize SPECjvm98 benchmarks., , , , , and . ICS, page 22-33. ACM, (2000)A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support., , , , , , , , , and 3 other author(s). ISLPED, page 34:1-34:6. ACM, (2018)A clock power model to evaluate impact of architectural and technology optimizations., , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (6): 844-855 (2002)Managing Leakage Energy in Cache Hierarchies., , , , , , and . J. Instruction-Level Parallelism, (2003)An integer linear programming-based tool for wireless sensor networks., , , and . J. Parallel Distributed Comput., 65 (3): 247-260 (2005)Design considerations for databus charge recovery., , , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (1): 104-106 (2001)