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A 220-mm2, four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture.

, , , , , , , , , , , , , и . IEEE J. Solid State Circuits, 33 (11): 1711-1719 (1998)

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Martin Gall

Helmut Gall

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Monika Gall

 

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