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Disambiguation of "Fick, David"

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Razor-lite: A side-channel error-detection register for timing-margin recovery in 45nm SOI CMOS.

, , , , , and . ISSCC, page 264-265. IEEE, (2013)

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Helmuth Fick

Luise Fick

Hans Fick

Klaus Fick

Werner Fick

 

Other publications of authors with the same name

Assessing the performance limits of parallelized near-threshold computing., , , , , , and . DAC, page 1147-1152. ACM, (2012)Reconfigurable Multicore Server Processors for Low Power Operation., , , , and . SAMOS, volume 5657 of Lecture Notes in Computer Science, page 247-254. Springer, (2009)A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS., , , , and . IEEE J. Solid State Circuits, 49 (11): 2462-2473 (2014)A highly resilient routing algorithm for fault-tolerant NoCs., , , , , and . DATE, page 21-26. IEEE, (2009)Centip3De: A 64-core, 3D stacked, near-threshold system., , , , , , , , , and 5 other author(s). Hot Chips Symposium, page 1-30. IEEE, (2012)Limits of Parallelism and Boosting in Dim Silicon., , , , , , and . IEEE Micro, 33 (5): 30-37 (2013)Bubble Razor: An architecture-independent approach to timing-error detection and correction., , , , , , and . ISSCC, page 488-490. IEEE, (2012)Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction., , , , , , and . IEEE J. Solid State Circuits, 48 (1): 66-81 (2013)Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 48 (1): 104-117 (2013)A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 48 (3): 801-813 (2013)