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Disambiguation of "Sylvester, Dennis"

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Razor-lite: A side-channel error-detection register for timing-margin recovery in 45nm SOI CMOS.

, , , , , and . ISSCC, page 264-265. IEEE, (2013)

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Sylvester Dinkel

Sylvester Lindemann

Gerd Sylvester

Hanns Sylvester

Sylvester Kettner

 

Other publications of authors with the same name

Improved a priori interconnect predictions and technology extrapolation in the GTX system., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (1): 3-14 (2003)Minimizing total power by simultaneous Vdd/Vth assignment., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (5): 665-677 (2004)Underdesigned and Opportunistic Computing in Presence of Hardware Variability., , , , , , , , , and 2 other author(s). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (1): 8-23 (2013)A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates., , , , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 16 (3): 395-408 (2022)A Low Ripple Switched-Capacitor Voltage Regulator Using Flying Capacitance Dithering., , , , and . IEEE J. Solid State Circuits, 51 (4): 919-929 (2016)Introduction to the January Special Issue on the 2016 IEEE International Solid-State Circuits Conference., , , , and . IEEE J. Solid State Circuits, 52 (1): 3-7 (2017)A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory., , , and . IEEE J. Solid State Circuits, 51 (4): 1009-1021 (2016)Victim Alignment in Crosstalk-Aware Timing Analysis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 261-274 (2010)RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 56 (4): 1105-1115 (2021)A 5.58 nW Crystal Oscillator Using Pulsed Driver for Real-Time Clocks., , , and . IEEE J. Solid State Circuits, 51 (2): 509-522 (2016)