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Binary Decision Diagrams and the Multiple Variable Order Problem

, , , , , and . Universität Trier, Mathematik/Informatik, Forschungsbericht, (1998)

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Thread-based multi-engine model checking for multicore platforms., , and . ACM Trans. Design Autom. Electr. Syst., 18 (3): 36:1-36:28 (2013)Verification and synthesis of counters based on symbolic techniques., , , and . ED&TC, page 176-181. IEEE Computer Society, (1997)Symbolic traversals of data paths with auxiliary variables., , and . Great Lakes Symposium on VLSI, page 93-96. IEEE, (1994)Interpolation sequences revisited., , and . DATE, page 316-322. IEEE, (2011)Circuit Based Quantification: Back to State Set Manipulation within Unbounded Model Checking., , , and . DATE, page 688-689. IEEE Computer Society, (2005)Automated abstraction by incremental refinement in interpolant-based model checking., , and . ICCAD, page 129-136. IEEE Computer Society, (2008)Trading-Off SAT Search and Variable Quantifications for Effective Unbounded Model Checking., , , , , and . FMCAD, page 1-8. IEEE, (2008)Improved reachability analysis of large finite state machines., , and . ICCAD, page 354-360. IEEE Computer Society / ACM, (1996)Cross-fertilizing FSM verification techniques and sequential diagnosis., , , , and . EURO-DAC, page 306-311. IEEE Computer Society Press, (1992)SAT solver management strategies in IC3: an experimental approach., , , , and . Formal Methods Syst. Des., 50 (1): 39-74 (2017)