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Multi-level Logic Simplification Using Don't Cares and Filters., , , and . DAC, page 277-282. ACM Press, (1989)Performance Optimization Using Exact Sensitization., , , , and . DAC, page 425-429. ACM Press, (1994)Delay fault coverage, test set size, and performance trade-offs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (1): 32-44 (1995)Is Redundancy Necessary to Reduce Delay., , and . DAC, page 228-234. IEEE Computer Society Press, (1990)Verification of Electronic Systems., , and . DAC, page 106-111. ACM Press, (1996)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , and . DAC, page 254-260. ACM Press, (1995)Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation., , and . DAC, page 173-176. IEEE Computer Society Press, (1992)Trace driven logic synthesis - application to power minimization., , , and . ICCAD, page 581-588. IEEE Computer Society / ACM, (1997)Compact and complete test set generation for multiple stuck-faults., , , and . ICCAD, page 212-219. IEEE Computer Society / ACM, (1996)Supervisory Control of Finite State Machines., , , , and . CAV, volume 939 of Lecture Notes in Computer Science, page 279-292. Springer, (1995)