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RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications.

, , , , and . DATE, page 783-788. IEEE Computer Society, (2010)

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In-place LUT polarity inVersion to mitigate soft errors for FPGAs., , , and . DFT, page 81-86. IEEE Computer Society, (2016)Low power scheduling method using multiple supply voltages., , , and . ISCAS, IEEE, (2006)Fault modeling and characteristics of SRAM-based FPGAs (abstract only)., , , , , and . FPGA, page 279. ACM, (2011)Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms., , , , , , , and . FPL, page 282-285. IEEE Computer Society, (2011)In-place decomposition for robustness in FPGA., , and . ICCAD, page 143-148. IEEE, (2010)Fault-tolerant resynthesis with dual-output LUTs., , , , and . ASP-DAC, page 325-330. IEEE, (2010)RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications., , , , and . DATE, page 783-788. IEEE Computer Society, (2010)Heterogeneous configuration memory scrubbing for soft error mitigation in FPGAs., , , , , , and . FPT, page 23-28. IEEE, (2012)Simultaneous test pattern compaction, ordering and X-filling for testing power reduction., , , and . ISQED, page 702-707. IEEE Computer Society, (2009)Mitigating FPGA interconnect soft errors by in-place LUT inversion., , , , and . ICCAD, page 582-586. IEEE Computer Society, (2011)