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MTJ based non-volatile flip-flop in deep submicron technology., , , , , и . ISOCC, стр. 424-427. IEEE, (2011)An MTJ-based non-volatile flip-flop for high-performance SoC., , , , , и . I. J. Circuit Theory and Applications, 42 (4): 394-406 (2014)Noise-aware power optimization for on-chip interconnect., , , , и . ISLPED, стр. 108-113. ACM, (2000)Transistor sizing for reliable domino logic design in dual threshold voltage technologies., , и . ACM Great Lakes Symposium on VLSI, стр. 133-138. ACM, (2001)Low-swing clock domino logic incorporating dual supply and dual threshold voltages., , и . DAC, стр. 467-472. ACM, (2002)Pseudo NMOS based sense amplifier for high speed single-ended SRAM., , , , и . ICECS, стр. 331-334. IEEE, (2014)Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM., , , , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (11): 1059-1063 (2016)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1567-1571 (2022)A Highly Integrated Crosspoint Array Using Self-rectifying FTJ for Dual-mode Operations: CAM and PUF., , , , , , , , , и . ESSCIRC, стр. 113-116. IEEE, (2022)