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Disambiguation of "Takizawa, Hiroyuki"

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Towards Priority-Flexible Task Mapping for Heterogeneous Multi-core NUMA Systems.

, , , , and . PDCAT, volume 13798 of Lecture Notes in Computer Science, page 3-15. Springer, (2022)

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Hiroyuki Tan

Hiroyuki Kobayashi

Chieko Takizawa

Hiroyuki Okamuro

Hiroyuki Takada

 

Other publications of authors with the same name

Hierarchical parallel processing of large scale data clustering on a PC cluster with GPU co-processing., and . J. Supercomput., 36 (3): 219-234 (2006)A Machine Learning-Based Approach for Selecting SpMV Kernels and Matrix Storage Formats., , , and . IEICE Trans. Inf. Syst., 101-D (9): 2307-2314 (2018)Online MPI Process Mapping for Coordinating Locality and Memory Congestion on NUMA Systems., , , and . Supercomput. Front. Innov., 7 (1): 71-90 (2020)neoSYCL: a SYCL implementation for SX-Aurora TSUBASA., , and . HPC Asia, page 50-57. ACM, (2021)A Method for Reducing Time-to-Solution in Quantum Annealing Through Pausing., and . HPC Asia, page 137-145. ACM, (2022)A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs., , , and . MEDEA@PACT, page 113-120. ACM, (2007)Modeling of cache access behavior based on Zipf's law., , , and . MEDEA@PACT, page 9-15. ACM, (2008)Enhancing Memory Bandwidth in a Single Stream Computation with Multiple FPGAs., , and . FPT, page 378-380. IEEE, (2018)Peachy Parallel Assignments (EduHPC 2019)., , , , , , , , , and 2 other author(s). EduHPC@SC, page 75-83. IEEE, (2019)Design and evaluation of a media-oriented vector processor with a multi-banked cache memory., , , , and . ESTIMedia, page 78-87. IEEE, (2013)