Novelics, a leading provider of system-on-chip (SoC) embedded memory intellectual property (IP), announced the availability of its one-transistor SRAM for 65-nanometer semiconductor design, the only SRAM-1T memory available to SoC designers in bulk CMOS using the standard silicon wafer process. Novelics’ coolSRAM-1T is designed to optimize memory-intensive applications in computing, networking, wireless, multimedia, graphics, automotive, consumer electronics products and more by:
* Shrinking the SoC embedded memory area up to 50 percent versus using industry-standard SRAM
* Lowering development time and costs through standard bulk CMOS that eliminates extra mask layers and special processing steps
* Reducing memory leakage power consumption by a factor of 10
* Offering the opportunity in many designs to reduce or eliminate off-chip memory systems, enabling dramatic savings in system cost and power consumption
R. B. K. Mishra, Sandhya Save. Volume 6 von 2, 1133 Broadway,Suite 706,New York,NY10010,USA, Institute of Doctors Engineers and scientist(IDES), The Association of Copmuter Electronics and Electrical Engineers, (November 2011)