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(14)

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Hybrid Cache Analysis in Running Time Verification of Embedded Software.
Fabian Wolf, Jan Staschulat, and Rolf Ernst Design Autom. for Emb. Sys. 7(3):271-295 (2002)
to dblp by dblp on Nov 30, 2011, 12:00 AM
URL | BibTeX
Dataflow models for shared memory access latency analysis.
Jan Staschulat, and Marco Bekooij EMSOFT, page 275-284. ACM, (2009)
to dblp by dblp on Oct 26, 2009, 12:00 AM
URL | BibTeX
The Worst-Case Execution Time Problem — Overview of Methods and Survey of Tools
Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David B. Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter P. Puschner, Jan Staschulat, and Per Stenström ACM Trans. Embedded Comput. Syst. (2008)http://dblp.uni-trier.de/db/journals/tecs/tecs7.html#WilhelmEEHTWBFHMMPPSS08 .
to MAXT mgr todo_tags by gwpl and 1 other user on Jul 15, 2009, 6:23 PM
URL | BibTeX
Cost-Efficient Worst-Case Execution Time Analysis in Industrial Practice.
Jan Staschulat, Jörn-Christian Braam, Rolf Ernst, Thomas Rambow, Rainer Schlör, and Rainer Busch ISoLA, page 204-211. IEEE, (2006)
to dblp by dblp on Jul 3, 2009, 12:00 AM
URL | BibTeX
The worst-case execution-time problem - overview of methods and survey of tools.
Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David B. Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter P. Puschner, Jan Staschulat, and Per Stenström ACM Trans. Embedded Comput. Syst. (2008)
to dblp by dblp and 1 other user on May 9, 2008, 12:00 AM
URL | BibTeX
Analysis of Memory Latencies in Multi-Processor Systems.
Jan Staschulat, Simon Schliecker, Matthias Ivers, and Rolf Ernst WCET, volume 1 of OASICS, Internationales Begegnungs- und Forschungszentrum fuer Informatik IBFI, Schloss Dagstuhl, Germany, (2005)
to dblp by dblp on Jan 31, 2008, 12:00 AM
URL | BibTeX
A Framework for the Busy Time Calculation of Multiple Correlated Events.
Simon Schliecker, Matthias Ivers, Jan Staschulat, and Rolf Ernst WCET, volume 4 of OASICS, Internationales Begegnungs- und Forschungszentrum fuer Informatik IBFI, Schloss Dagstuhl, Germany, (2006)
to dblp by dblp on Jan 31, 2008, 12:00 AM
URL | BibTeX
Worst case timing analysis of input dependent data cache behavior.
Jan Staschulat, and Rolf Ernst ECRTS, page 227-236. IEEE Computer Society, (2006)
to dblp by dblp on Dec 4, 2007, 12:00 AM
URL | BibTeX
Scalable precision cache analysis for real-time software.
Jan Staschulat, and Rolf Ernst ACM Trans. Embedded Comput. Syst. (2007)
to dblp by dblp on Nov 6, 2007, 12:00 AM
URL | BibTeX
Scalable precision cache analysis for preemptive scheduling.
Jan Staschulat, and Rolf Ernst LCTES, page 157-165. ACM, (2005)
to dblp by dblp on Mar 17, 2006, 12:00 AM
URL | BibTeX
Scheduling Analysis of Real-Time Systems with Precise Modeling of Cache Related Preemption Delay.
Jan Staschulat, Simon Schliecker, and Rolf Ernst ECRTS, page 41-48. IEEE Computer Society, (2005)
to dblp by dblp on Mar 10, 2006, 12:00 AM
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Multiple process execution in cache related preemption delay analysis.
Jan Staschulat, and Rolf Ernst EMSOFT, page 278-286. ACM, (2004)
to dblp by dblp on Feb 13, 2006, 12:00 AM
URL | BibTeX
Context Sensitive Performance Analysis of Automotive Applications.
Jan Staschulat, Rolf Ernst, Andreas Schulze, and Fabian Wolf DATE, page 165-170. IEEE Computer Society, (2005)
to dblp by dblp on Apr 13, 2005, 12:00 AM
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Associative caches in formal software timing analysis.
Fabian Wolf, Jan Staschulat, and Rolf Ernst DAC, page 622-627. ACM, (2002)
to dblp by dblp on Dec 16, 2002, 12:00 AM
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