%0 Journal Article %1 journals/taco/GottschoBDNG15 %A Gottscho, Mark %A BanaiyanMofrad, Abbas %A Dutt, Nikil D. %A Nicolau, Alex %A Gupta, Puneet %D 2015 %J ACM Trans. Archit. Code Optim. %K dblp %N 3 %P 27:1-27:26 %T DPCS: Dynamic Power/Capacity Scaling for SRAM Caches in the Nanoscale Era. %U http://dblp.uni-trier.de/db/journals/taco/taco12.html#GottschoBDNG15 %V 12

@article{journals/taco/GottschoBDNG15, added-at = {2021-10-28T00:00:00.000+0200}, author = {Gottscho, Mark and BanaiyanMofrad, Abbas and Dutt, Nikil D. and Nicolau, Alex and Gupta, Puneet}, biburl = {https://www.bibsonomy.org/bibtex/21bd80eec936e64791aa3aee77c7d9e3f/dblp}, ee = {https://doi.org/10.1145/2792982}, interhash = {3989576cdc105638aee24e4d336091f8}, intrahash = {1bd80eec936e64791aa3aee77c7d9e3f}, journal = {ACM Trans. Archit. Code Optim.}, keywords = {dblp}, number = 3, pages = {27:1-27:26}, timestamp = {2024-04-08T20:06:57.000+0200}, title = {DPCS: Dynamic Power/Capacity Scaling for SRAM Caches in the Nanoscale Era.}, url = {http://dblp.uni-trier.de/db/journals/taco/taco12.html#GottschoBDNG15}, volume = 12, year = 2015 }