%0 Journal Article %1 journals/tcas/TanakamaruYTNT15 %A Tanakamaru, Shuhei %A Yamazawa, Hiroki %A Tokutomi, Tsukasa %A Ning, Sheyang %A Takeuchi, Ken %D 2015 %J IEEE Trans. Circuits Syst. I Regul. Pap. %K dblp %N 3 %P 844-853 %T Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage. %U http://dblp.uni-trier.de/db/journals/tcas/tcasI62.html#TanakamaruYTNT15 %V 62-I

@article{journals/tcas/TanakamaruYTNT15, added-at = {2020-05-22T00:00:00.000+0200}, author = {Tanakamaru, Shuhei and Yamazawa, Hiroki and Tokutomi, Tsukasa and Ning, Sheyang and Takeuchi, Ken}, biburl = {https://www.bibsonomy.org/bibtex/23f41a7704ccbc7e4806cc2c8d68fdee7/dblp}, ee = {https://doi.org/10.1109/TCSI.2014.2370171}, interhash = {4ee01c1f775212e0aafd8185b59d9ac8}, intrahash = {3f41a7704ccbc7e4806cc2c8d68fdee7}, journal = {IEEE Trans. Circuits Syst. I Regul. Pap.}, keywords = {dblp}, number = 3, pages = {844-853}, timestamp = {2020-05-23T12:32:52.000+0200}, title = {Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasI62.html#TanakamaruYTNT15}, volume = {62-I}, year = 2015 }