%0 Conference Paper %1 conf/vlsic/MatsunagaMHKIEO12 %A Matsunaga, Shoun %A Miura, Sadahiko %A Honjou, Hiroaki %A Kinoshita, Keizo %A Ikeda, Shoji %A Endoh, Tetsuo %A Ohno, Hideo %A Hanyu, Takahiro %B VLSIC %D 2012 %I IEEE %K dblp %P 44-45 %T A 3.14 um2 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2012.html#MatsunagaMHKIEO12 %@ 978-1-4673-0848-9

@inproceedings{conf/vlsic/MatsunagaMHKIEO12, added-at = {2022-10-02T00:00:00.000+0200}, author = {Matsunaga, Shoun and Miura, Sadahiko and Honjou, Hiroaki and Kinoshita, Keizo and Ikeda, Shoji and Endoh, Tetsuo and Ohno, Hideo and Hanyu, Takahiro}, biburl = {https://www.bibsonomy.org/bibtex/247d283325796c9def108f44fc11a32eb/dblp}, booktitle = {VLSIC}, crossref = {conf/vlsic/2012}, ee = {https://doi.org/10.1109/VLSIC.2012.6243781}, interhash = {cd701fbd50936e477df7a3acf25beed5}, intrahash = {47d283325796c9def108f44fc11a32eb}, isbn = {978-1-4673-0848-9}, keywords = {dblp}, pages = {44-45}, publisher = {IEEE}, timestamp = {2024-04-10T15:33:47.000+0200}, title = {A 3.14 um2 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2012.html#MatsunagaMHKIEO12}, year = 2012 }