%0 Conference Paper %1 conf/mmsp/CaoXPWY06 %A Cao, Xixin %A Xie, Qingqing %A Peng, Chungan %A Wang, Qingchun %A Yu, Dunshan %B MMSP %D 2006 %I IEEE %K dblp %P 364-367 %T An Efficient VLSI Implementation of Distributed Architecture for DWT. %U http://dblp.uni-trier.de/db/conf/mmsp/mmsp2006.html#CaoXPWY06 %@ 0-7803-9751-7

@inproceedings{conf/mmsp/CaoXPWY06, added-at = {2017-05-21T00:00:00.000+0200}, author = {Cao, Xixin and Xie, Qingqing and Peng, Chungan and Wang, Qingchun and Yu, Dunshan}, biburl = {https://www.bibsonomy.org/bibtex/28d22e3f32f8aff4402e1f80d14f294cf/dblp}, booktitle = {MMSP}, crossref = {conf/mmsp/2006}, ee = {https://doi.org/10.1109/MMSP.2006.285331}, interhash = {cd8b244fc3e387026cd97719553e1538}, intrahash = {8d22e3f32f8aff4402e1f80d14f294cf}, isbn = {0-7803-9751-7}, keywords = {dblp}, pages = {364-367}, publisher = {IEEE}, timestamp = {2019-10-17T20:27:48.000+0200}, title = {An Efficient VLSI Implementation of Distributed Architecture for DWT.}, url = {http://dblp.uni-trier.de/db/conf/mmsp/mmsp2006.html#CaoXPWY06}, year = 2006 }