%0 Conference Paper %1 conf/iscas/QuekLAS03 %A Quek, K. H. %A Lam, Siew Kei %A Agrawal, N. K. %A Srikanthan, Thambipillai %B ISCAS (3) %D 2003 %I IEEE %K dblp %P 224-227 %T Architectural design and analysis toolbox to implement shortest path algorithms in hardware. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2003-3.html#QuekLAS03 %@ 0-7803-7761-3

@inproceedings{conf/iscas/QuekLAS03, added-at = {2016-05-20T00:00:00.000+0200}, author = {Quek, K. H. and Lam, Siew Kei and Agrawal, N. K. and Srikanthan, Thambipillai}, biburl = {https://www.bibsonomy.org/bibtex/24d443c90617afb844493ba93309bc093/dblp}, booktitle = {ISCAS (3)}, crossref = {conf/iscas/2003}, ee = {http://dx.doi.org/10.1109/ISCAS.2003.1204996}, interhash = {bfa2954c285b00fa0a8ee1b40908f1bf}, intrahash = {4d443c90617afb844493ba93309bc093}, isbn = {0-7803-7761-3}, keywords = {dblp}, pages = {224-227}, publisher = {IEEE}, timestamp = {2016-05-21T11:45:42.000+0200}, title = {Architectural design and analysis toolbox to implement shortest path algorithms in hardware.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2003-3.html#QuekLAS03}, year = 2003 }