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A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array., , and . ISCAS, page 1-4. IEEE, (2017)Configurable Input-Output Power Pad for Wafer-Scale Microelectronic Systems., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (11): 2024-2033 (2013)An Asynchronous Delta-Modulator Based A/D Converter for an Electronic System Prototyping Platform., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (6): 751-762 (2016)Software rendering methods to display wafer scale integrated circuit dataset., , and . CCECE, page 1-4. IEEE, (2013)A novel spatially configurable differential interface for an electronic system prototyping platform., , , and . Integr., (2016)Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits., , and . Integr., (2018)A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems., , and . LASCAS, page 1-4. IEEE, (2013)Acceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL., , and . ISCAS, page 1-5. IEEE, (2021)Thermo-mechanical analysis of a reconfigurable wafer-scale integrated circuit., , , , , , , and . ICECS, page 315-318. IEEE, (2010)Digital signal propagation on a wafer-scale smart active programmable interconnect., , , , and . ICECS, page 1059-1062. IEEE, (2008)