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32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.

J. Qiu, Z. Sun, B. Liu, W. Wang, D. Xu, H. Herdian, H. Huang, Y. Zhang, Y. Wang, A. Shirane, and K. Okada. ISSCC, page 454-456. IEEE, (2021)

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Liu Liu

Yifei Liu

Yan Liu

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A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR.J. Pang, Z. Li, R. Kubozoe, X. Luo, R. Wu, Y. Wang, D. You, A. Fadila, R. Saengchan, T. Nakamura and 16 other author(s). IEEE J. Solid State Circuits, 55 (9): 2371-2386 (2020)A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration.B. Liu, Y. Zhang, J. Qiu, H. Ngo, W. Deng, K. Nakata, T. Yoshioka, J. Emmei, J. Pang, A. Narayanan and 4 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 68 (2): 603-616 (2021)0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur.H. Zhang, A. Narayanan, H. Herdian, B. Liu, Y. Wang, A. Shirane, and K. Okada. VLSI Circuits, page 38-. IEEE, (2019)A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation.J. Pang, Z. Li, X. Luo, J. Alvin, R. Saengchan, A. Fadila, K. Yanagisawa, Y. Zhang, Z. Chen, Z. Huang and 15 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)An LC-DCO based synthesizable injection-locked PLL with an FoM of -250.3dB.D. Yang, W. Deng, B. Liu, T. Siriburanon, K. Okada, and A. Matsuzawa. ESSCIRC, page 197-200. IEEE, (2016)A 60-GHz 3.0-Gb/s Spectrum Efficient BPOOK Transceiver for Low-Power Short-Range Wireless in 65-nm CMOS.Y. Wang, B. Liu, R. Wu, H. Liu, A. Narayanan, J. Pang, N. Li, T. Yoshioka, Y. Terashima, H. Zhang and 6 other author(s). IEEE J. Solid State Circuits, 54 (5): 1363-1374 (2019)A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS.Y. Wang, R. Wu, J. Pang, D. You, A. Fadila, R. Saengchan, X. Fu, D. Matsumoto, T. Nakamura, R. Kubozoe and 12 other author(s). IEEE J. Solid State Circuits, 55 (5): 1249-1269 (2020)A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock.H. Zhang, A. Narayanan, H. Herdian, B. Liu, R. Wu, A. Shirane, and K. Okada. IEICE Trans. Electron., 102-C (4): 276-286 (2019)32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.J. Qiu, Z. Sun, B. Liu, W. Wang, D. Xu, H. Herdian, H. Huang, Y. Zhang, Y. Wang, A. Shirane and 1 other author(s). ISSCC, page 454-456. IEEE, (2021)An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator based Frequency Synthesizer and Digital Background EVM Calibration.B. Liu, Y. Zhang, J. Qiu, W. Deng, Z. Xu, H. Zhang, J. Pang, Y. Wang, R. Wu, T. Someya and 2 other author(s). CICC, page 1-4. IEEE, (2019)

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Disambiguation of "Liu, Bangan"

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32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Yifei Liu

Yan Liu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liu, Bangan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Yifei Liu

Yan Liu

Other publications of authors with the same name

Disambiguation

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32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.