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A hardware based low temperature solution for VLSI testing using decompressor side masking.

, , , and . ISCAS, page 637-640. IEEE, (2015)

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Customizing pattern set for test power reduction via improved X-identification and reordering., , , and . ISLPED, page 177-182. ACM, (2010)A Metric for Test Set Characterization and Customization Toward Fault Diagnosis., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (11): 1824-1828 (2013)Particle Swarm Optimization Based BIST Design for Memory Cores in Mesh Based Network-on-Chip., , , and . VDAT, volume 7373 of Lecture Notes in Computer Science, page 343-349. Springer, (2012)A Novel Technique to Reduce both Leakage and Peak Power during Scan Testing., , and . ICIIS, page 1-6. IEEE, (2008)Post-Silicon Validation and Diagnosis., and . VLSID, page 9-10. IEEE Computer Society, (2016)Thermal Aware Don't Care Filling to Reduce Peak Temperature and Thermal Variance during Testing., , and . Asian Test Symposium, page 25-30. IEEE Computer Society, (2013)Fault diagnosis in designs with extreme low pin test data compressors., , and . DATE, page 1285-1288. ACM, (2015)Framework for Multiple-Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (3): 696-700 (2014)Efficient Don't Care Filling for Power Reduction during Testing., and . ARTCom, page 319-323. IEEE Computer Society, (2009)A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection., , , and . VLSI Design, page 436-441. IEEE Computer Society, (2012)