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Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices., , , , , and . IEEE Access, (2018)Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (10): 1863-1877 (2013)Replication-aware leakage management in chip multiprocessors with private L2 cache., , and . ISLPED, page 135-140. ACM, (2010)Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs., , , and . IEEE Comput. Archit. Lett., 8 (1): 5-8 (2009)Data parallel address architecture., and . IEEE Comput. Archit. Lett., 5 (1): 30-33 (2006)MAEPER: Matching Access and Error Patterns With Error-Free Resource for Low Vcc L1 Cache., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (6): 1013-1026 (2013)Human Silhouette Extraction Method Using Region Based Background Subtraction., and . MIRAGE, volume 4418 of Lecture Notes in Computer Science, page 412-420. Springer, (2007)Evaluation of Performance Unfairness in NUMA System Architecture., , , , and . IEEE Comput. Archit. Lett., 16 (1): 26-29 (2017)HyPHEN: A Hybrid Packing Method and Its Optimizations for Homomorphic Encryption-Based Neural Networks., , , , and . IEEE Access, (2024)Future Scaling of Memory Hierarchy for Tensor Cores and Eliminating Redundant Shared Memory Traffic Using Inter-Warp Multicasting., , , , and . IEEE Trans. Computers, 71 (12): 3115-3126 (2022)