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Sub-threshold logic circuit design using feedback equalization., и . DATE, стр. 1-6. European Design and Automation Association, (2014)Neural network-based accelerators for transcendental function approximation., , , и . ACM Great Lakes Symposium on VLSI, стр. 169-174. ACM, (2014)Wave-pipelined multiplexed (WPM) routing for gigascale integration (GSI)., и . IEEE Trans. Very Large Scale Integr. Syst., 13 (8): 899-910 (2005)FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption., , , , , , , и . HPCA, стр. 882-895. IEEE, (2023)SealPK: Sealable Protection Keys for RISC-V., , , и . DATE, стр. 1278-1281. IEEE, (2021)Network-on-Chip Microarchitecture-based Covert Channel in GPUs., , , , , , , и . MICRO, стр. 565-577. ACM, (2021)Thermal management of manycore systems with silicon-photonic networks., , , и . DATE, стр. 1-6. European Design and Automation Association, (2014)Design of Reliable and Secure Multipliers by Multilinear Arithmetic Codes., , , и . ICICS, том 5927 из Lecture Notes in Computer Science, стр. 47-62. Springer, (2009)MGSim + MGMark: A Framework for Multi-GPU System Research., , , , , , , , , и 3 other автор(ы). CoRR, (2018)Efficient Sealable Protection Keys for RISC-V., , , и . CoRR, (2020)