( en | de | ru )

 

Disambiguation of "Linnhoff, Sebastian"

Author of the publication

copydeleteadd this publication to your clipboard
A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC Filter.

, , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Michael Linnhoff

Markus Linnhoff

Gerd Linnhoff

Lieselotte Linnhoff

Wolfgang Linnhoff

 

Other publications of authors with the same name

A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction., , , , , and . ISCAS, page 1-4. IEEE, (2021)A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOS., , , , , , and . NEWCAS, page 1-4. IEEE, (2023)A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOS., , , , and . NEWCAS, page 1-5. IEEE, (2023)A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOS., , , and . ISCAS, page 1-5. IEEE, (2021)A Temperature and Process Corner Insensitive Design Method for Digital Circuits in 40nm CMOS., , and . MWSCAS, page 779-782. IEEE, (2018)A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28nm CMOS., , , and . ICECS, page 1-4. IEEE, (2020)A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC Filter., , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 10Bit 6 GS/s Time-Interleaved SAR ADC with a Single Full-Rate Front-End Track-and-Hold., , , , , and . NEWCAS, page 1-5. IEEE, (2023)A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling., , , , , and . ISCAS, page 1-5. IEEE, (2023)