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A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (8): 1417-1429 (2007)A routing algorithm for flip-chip design., , , , and . ICCAD, page 753-758. IEEE Computer Society, (2005)An Accurate Time-Domain Current Waveform Simulator for VLSI Circuits., , and . EDAC-ETC-EUROASIC, page 562-566. IEEE Computer Society, (1994)Simultaneous block and I/O buffer floorplanning for flip-chip design., , , and . ASP-DAC, page 213-218. IEEE, (2006)