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Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design., , and . FPGA, page 247. ACM, (1999)Program phase and runtime distribution-aware online DVFS for combined Vdd/Vbb scaling., , and . DATE, page 417-422. IEEE, (2009)Joint optimization of speed, accuracy, and energy for embedded image recognition systems., , , , and . DATE, page 715-720. IEEE, (2018)Entry control in network-on-chip for memory power reduction., , and . ISLPED, page 171-176. ACM, (2008)Memory Efficient Patch-based Training for INR-based GANs., , , , and . CoRR, (2022)A network congestion-aware memory subsystem for manycore., , and . ACM Trans. Embed. Comput. Syst., 12 (4): 110:1-110:18 (2013)Nonvolatile Write Buffer-Based Journaling Bypass for Storage Write Reduction in Mobile Devices., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (9): 1747-1759 (2018)Optimizing geographically distributed timed cosimulation by hierarchically grouped messages., and . CODES, page 100-104. ACM, (1999)Exploiting Spatial Dimensions of Latent in GAN for Real-Time Image Editing., , , , and . CVPR, page 852-861. Computer Vision Foundation / IEEE, (2021)DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture., , and . HPCA, page 25-36. IEEE Computer Society, (2014)