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Efficient Multiway Hash Join on Reconfigurable Hardware., , , , and . TPCTC, volume 12257 of Lecture Notes in Computer Science, page 19-38. Springer, (2019)Design of programmable, energy-efficient reconfigurable accelerators.. Stanford University, USA, (2018)Scalable interconnects for reconfigurable spatial architectures., , , , , and . ISCA, page 615-628. ACM, (2019)Plasticine: A Reconfigurable Architecture For Parallel Paterns., , , , , , , , and . ISCA, page 389-402. ACM, (2017)CUDA-For-Clusters: A System for Efficient Execution of CUDA Kernels on Multi-core Clusters., , and . Euro-Par, volume 7484 of Lecture Notes in Computer Science, page 415-426. Springer, (2012)(CGRA4HPC) 2022 Invited Speaker: Pushing the Boundaries of HPC with the Integration of AI.. IPDPS Workshops, page 627. IEEE, (2022)Training Large Language Models Efficiently with Sparsity and Dataflow., , , and . CoRR, (2023)SambaNova SN10 RDU: A 7nm Dataflow Architecture to Accelerate Software 2.0., , and . ISSCC, page 350-352. IEEE, (2022)Generating Configurable Hardware from Parallel Patterns., , , , , , and . ASPLOS, page 651-665. ACM, (2016)Generating Configurable Hardware from Parallel Patterns. (2016)