( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Delay fault testing of iterative arithmetic arrays.

, , , и . VTS, стр. 25-30. IEEE Computer Society, (1992)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Rabindra Roy

K Dutta-Roy

Rabindra Nath Chakraborty

Roy Hornig

Beschreibung mikro-rheologischer Vorgänge und resultierender Verbundstrukturen beim Elastomermischprozeß im Innenmischer durch rheologische Untersuchungen. NA Halle-Wittenberg, (2009)

Smritindu Roy

 

Другие публикации лиц с тем же именем

The Best Flip-Flops to Scan., , и . ITC, стр. 166-173. IEEE Computer Society, (1991)Concurrent Error Detection in Nonlinear Digital Circuits with Applications to Adaptive Filters., и . ICCD, стр. 606-609. IEEE Computer Society, (1993)Initialization Isuues in the Synthesis of Asynchronous Circuits., , , и . ICCD, стр. 447-452. IEEE Computer Society, (1994)Synchronous Test Generation Model for Asynchronous Circuits., , и . VLSI Design, стр. 178-185. IEEE Computer Society, (1996)Impact of Partial Reset on Fault Independent Testing and BIST., , и . VLSI Design, стр. 537-539. IEEE Computer Society, (1997)T5: Low-Power Design., , , и . VLSI Design, стр. 4. IEEE Computer Society, (1997)An Architectural Transformation Program for Optimization of Digital Systems by Multi-Level Decomposition., и . DAC, стр. 343-348. ACM Press, (1993)Efficient testing strategies for bit- and digit-serial arrays used in digital signal processors., , , и . Digit. Signal Process., 1 (4): 231-244 (1991)EDA challenges facing future microprocessor design., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (12): 1498-1506 (2000)Synthesis of Low Power Linear DSP Circuits Using Activity Metrics., и . VLSI Design, стр. 265-270. IEEE Computer Society, (1994)