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Disambiguation of "Hong, Xianlong"

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Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery.

, , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 433-441. Springer, (2004)

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Kang-hun Hong

Xin Hong

Moon-Shin Hong

Jung-soo Hong

Youn-Ho Hong

 

Other publications of authors with the same name

Integrated interlayer via planning and pin assignment for 3D ICs., , , and . SLIP, page 99-104. ACM, (2009)Topological routing to maximize routability for package substrate., , , , , , and . DAC, page 566-569. ACM, (2008)Stairway compaction using corner block list and its applications with rectilinear blocks., , , , , and . ACM Trans. Design Autom. Electr. Syst., 9 (2): 199-211 (2004)Effective congestion reduction for IC package substrate routing., , , , , and . ACM Trans. Design Autom. Electr. Syst., 15 (3): 27:1-27:21 (2010)Simultaneous slack budgeting and retiming for synchronous circuits optimization., , , and . ASP-DAC, page 49-54. IEEE, (2010)PS-FPG: pattern selection based co-design of floorplan and power/ground network with wiring resource optimization., , , , and . ASP-DAC, page 769-774. IEEE, (2010)Partitioning-based decoupling capacitor budgeting via sequence of linear programming., , , and . Integr., 40 (4): 516-524 (2007)An efficient hierarchical timing-driven Steiner tree algorithm for global routing., , , , and . Integr., 35 (2): 69-84 (2003)Floorplanning with abutment constraints based on corner block list., , , , , and . Integr., 31 (1): 65-77 (2001)Early Stage Power Supply Planning: A Heuristic Method for Codesign of Power/Ground Network and Floorplan., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (12): 3443-3450 (2008)