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Disambiguation of "Jone, Wen-Ben"

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Soft-Error-Tolerant Design Methodology for Balancing Performance, Power, and Reliability.

, , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (9): 1628-1639 (2015)

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Josef Edgar Jonek

Martina Jonen

Lars Jonetz-Mentzel

Hugh Jones

Stefan Joneleit

 

Other publications of authors with the same name

High-Performance Deadlock-Free ID Assignment for Advanced Interconnect Protocols., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (3): 1169-1173 (2016)Delay Fault Coverage Enhancement Using Variable Observation Times., , and . J. Electron. Test., 11 (2): 131-146 (1997)On random testing for combinational circuits with a high measure of confidence., and . IEEE Trans. Syst. Man Cybern., 22 (4): 748-754 (1992)Turbo1500: Core-Based Design for Test and Diagnosis., , , , , , , , , and 5 other author(s). IEEE Des. Test Comput., 26 (1): 26-35 (2009)A coordinated circuit partitioning and test generation method for pseudo-exhaustive testing of VLSI circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (3): 374-384 (1995)Pseudorandom test-length analysis using differential solutions., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (7): 815-825 (1996)Fault Modeling and Detection for Drowsy SRAM Caches., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (6): 1084-1100 (2007)Design theory and implementation for low-power segmented bus systems., , , , and . ACM Trans. Design Autom. Electr. Syst., 8 (1): 38-54 (2003)Fault simulation and response compaction in full scan circuits using HOPE., , , , , and . IEEE Trans. Instrumentation and Measurement, 54 (6): 2310-2328 (2005)DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip., , and . DAC, page 849-852. ACM, (2006)