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Disambiguation of "Sarmadi, Siavash Bayat"

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Dual-Basis Superserial Multipliers for Secure Applications and Lightweight Cryptographic Architectures.

, , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (2): 125-129 (2014)

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Dariusch Bayat-Sarmadi

Dariusch Bayat-Sarmadi

Dariusch Bayat-Sarmadi

Siavash Momeni

Siavash Soleimanifard

 

Other publications of authors with the same name

FPGA-Based Protection Scheme against Hardware Trojan Horse Insertion Using Dummy Logic., , , and . IEEE Embed. Syst. Lett., 7 (2): 46-50 (2015)Lightweight Fuzzy Extractor Based on LPN for Device and Biometric Authentication in IoT., and . IEEE Internet Things J., 8 (13): 10706-10713 (2021)A Low-Latency and Low-Complexity Point-Multiplication in ECC., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (9): 2869-2877 (2018)An Efficient Low-Latency Point-Multiplication Over Curve25519., and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (10): 3854-3862 (2019)Lurking Eyes: A Method to Detect Side-Channel Attacks on JavaScript and WebAssembly., , and . ISCISC, page 1-6. IEEE, (2020)Reliable hardware architectures for efficient secure hash functions ECHO and fugue., , and . CF, page 204-207. ACM, (2018)Lightweight Hardware Architectures for Efficient Secure Hash Functions ECHO and Fugue., , and . CoRR, (2018)A Study of Timing Side-Channel Attacks and Countermeasures on JavaScript and WebAssembly., , and . ISC Int. J. Inf. Secur., 14 (1): 27-46 (2022)A Digital Signature Architecture Suitable for V2V Applications., and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (2): 731-739 (February 2024)PartialHD: Toward Efficient Hyperdimensional Computing by Partial Processing., , and . IEEE Internet Things J., 11 (1): 987-994 (January 2024)