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On-chip process variation-tracking through an all-digital monitoring architecture.

, , , , и . IET Circuits Devices Syst., 6 (5): 366-373 (2012)

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Другие публикации лиц с тем же именем

Synthesis of application-specific memories for power optimization in embedded systems., , , и . DAC, стр. 300-303. ACM, (2000)Guest Editorial for the Special Section on Emerging Computational Paradigms., и . IEEE Trans. Emerg. Top. Comput., 6 (3): 303-304 (2018)Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation., , , и . IEEE Des. Test Comput., 17 (2): 74-85 (2000)Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (10): 2741-2752 (2010)A recursive algorithm for low-power memory partitioning., , и . ISLPED, стр. 78-83. ACM, (2000)From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip., , , , и . DAC, стр. 784-789. ACM, (2001)On-chip process variation-tracking through an all-digital monitoring architecture., , , , и . IET Circuits Devices Syst., 6 (5): 366-373 (2012)Architectures and synthesis algorithms for power-efficient businterfaces., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (9): 969-980 (2000)Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering., , , , и . PATMOS, том 5953 из Lecture Notes in Computer Science, стр. 227-236. Springer, (2009)Offline Data Profiling Techniques to Enhance Memory Compression in Embedded Systems., , и . PATMOS, том 2451 из Lecture Notes in Computer Science, стр. 314-322. Springer, (2002)