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Functional Fault Simulation as a Guide for Biased-Random Test Pattern Generation., and . IEEE Trans. Computers, 40 (1): 66-79 (1991)Architectural Improvements for Data-Driven VLSI Processing Arrays., , and . FPCA, page 243-259. ACM, (1989)Architectural Improvement for a Data-Driven VLSI Processing Array., , and . J. Parallel Distributed Comput., 19 (4): 308-322 (1993)Foreword to the special issues., and . Int. J. Parallel Program., 25 (4): 243-244 (1997)Embedding Tree Stuctures in VLlSI Hexagonal Arrays., , and . IEEE Trans. Computers, 33 (1): 104-107 (1984)An Improved Mapping of Data Flow Programs on a VLSI Array of Processors., and . ICPP, page 871-873. Pennsylvania State University Press, (1987)The 4x6 Tiered Architecture Method: An Approach to the Design of Enterprise Solutions., , , and . CAiSE Workshops, volume 112 of Lecture Notes in Business Information Processing, page 180-191. Springer, (2012)An architectural framework for migration from CISC to higher performance platforms., and . ICS, page 198-215. ACM, (1992)An Architectural Framework for Supporting Heterogeneous Instruction-Set Architectures., and . Computer, 26 (6): 39-56 (1993)Using a Hardware Simulation Engine for Custom MOS Structured Designs., , , and . IBM J. Res. Dev., 28 (5): 564-571 (1984)