( en | de | ru )

 

Disambiguation of "Sandre, Guido De"

Author of the publication

copydeleteadd this publication to your clipboard
How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results.

, , , , and . ISQED, page 107-112. IEEE Computer Society, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Bruno Remo Guidotti

Sauter Guido

Curt Guido

Isabella Guido

Luca Guido

 

Other publications of authors with the same name

Full-range cellular neural networks and differential variational inequalities., , , and . ISCAS, IEEE, (2006)Piecewise-exponential approximation for fast time-domain simulation of 2-D cellular neural networks., and . IEEE Trans. Circuits Syst. II Express Briefs, 51-II (8): 400-405 (2004)A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technology., , , , , , , and . ESSCIRC, page 503-506. IEEE, (2005)A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory., , , , , , , , , and . DAC, page 691-695. ACM, (2003)A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput., , , , , , , , , and 3 other author(s). ISSCC, page 268-269. IEEE, (2010)A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 46 (1): 52-63 (2011)Dynamical Analysis of Full-Range Cellular Neural Networks by Exploiting Differential Variational Inequalities., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (8): 1736-1749 (2007)A 1.2 V sense amplifier for high-performance embeddable NOR flash memories., , , , , , and . ISCAS (2), page 1266-1269. IEEE, (2005)Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications., , , , , , , , , and 1 other author(s). ESSCIRC, page 198-201. IEEE, (2008)How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results., , , , and . ISQED, page 107-112. IEEE Computer Society, (2005)