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Disambiguation of "Halambi, Ashok"

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Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language.

, , , , , and . ASP-DAC/VLSI Design, page 458-. IEEE Computer Society, (2002)

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Singh Ashok

Amit Ashok

Ashok Modi

Ashok Varandani

Ashok Ullal

 

Other publications of authors with the same name

RTGEN-an algorithm for automatic generation of reservation tables from architectural descriptions., , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (4): 731-737 (2003)Compilation framework for code size reduction using reduced bit-width ISAs (rISAs)., , , , and . ACM Trans. Design Autom. Electr. Syst., 11 (1): 123-146 (2006)Customizing Software Toolkits for Embedded Systems-On-Chip., , and . DIPES, volume 189 of IFIP Conference Proceedings, page 87-98. Kluwer, (2000)Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language., , , , , and . ASP-DAC/VLSI Design, page 458-. IEEE Computer Society, (2002)A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design ., , , , and . ISSS, page 120-125. ACM / IEEE Computer Society, (2002)New directions in compiler technology for embedded systems (embedded tutorial)., , , and . ASP-DAC, page 409-414. ACM, (2001)RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions., , , and . ISSS, page 44-50. ACM / IEEE Computer Society, (1999)An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs., , , , and . DATE, page 402-408. IEEE Computer Society, (2002)V-SAT: A visual specification and analysis tool for system-on-chip exploration., , , , , and . J. Syst. Archit., 47 (3-4): 263-275 (2001)V-SAT: A Visual Specification and Analysis Tool for System-On-Chip Exploration., , , , , and . EUROMICRO, page 1196-1203. IEEE Computer Society, (1999)