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A Fault-Tolerant Cache System of Automotive Vision Processor Complying With ISO26262., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (12): 1146-1150 (2016)HPC LINPACK Parameter Optimization on Homo-/Heterogeneous System of ARM Neoverse N1SDP., , , , , , and . HPC Asia, page 139-143. ACM, (2021)AIWareK: Compiling PyTorch Model for AI Processor Using MLIR Framework., , , , , and . AICAS, page 463-465. IEEE, (2022)Function-Safe Vehicular AI Processor with Nano Core-In-Memory Architecture., , , , , , , , , and . AICAS, page 127-131. IEEE, (2019)Chiplet Heterogeneous-Integration AI Processor., , , , , , , , , and 5 other author(s). ICEIC, page 1-2. IEEE, (2023)Backward Graph Construction and Lowering in DL Compiler for Model Training on AI Accelerators., , and . ISOCC, page 91-92. IEEE, (2022)Implementation of Yolo-v2 Image Recognition and Other Testbenches for a CNN Accelerator., , , , , , , , , and 1 other author(s). ICCE-Berlin, page 242-247. IEEE, (2019)0.6-2.7-Gb/s Referenceless Parallel CDR With a Stochastic Dispersion-Tolerant Frequency Acquisition Technique., , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (6): 1219-1225 (2014)A 4×10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (6): 2310-2320 (2016)A 1GHz fault tolerant processor with dynamic lockstep and self-recovering cache for ADAS SoC complying with ISO26262 in automotive electronics., , , and . A-SSCC, page 313-316. IEEE, (2017)