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Disambiguation of "Kennedy, Michael Peter"

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Optimized MASH-SR Divider Controller for Fractional-N Frequency Synthesizers.

, and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (3): 1057-1070 (March 2023)

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Michael Kennedy

Kevin Kennedy

Joel Kennedy

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Ricardo Kennedy

 

Other publications of authors with the same name

Digital signal Processor-based Investigation of Chua's Circuit family., , , and . Chua's Circuit, volume 1 of World Scientific Series on Nonlinear Science Series B, World Scientific, (1993)Comments on "folding of phase noise spectra in charge-pump phase-locked loops induced by frequency division"., , and . ICECS, page 612-615. IEEE, (2016)First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter., , and . ICECS, page 41-44. IEEE, (2010)Estimating the locking range of analog dividers through a phase-domain macromodel., , , and . ISCAS, page 1535-1538. IEEE, (2010)0.3-4.3 GHz Frequency-Accurate Fractional-N Frequency Synthesizer With Integrated VCO and Nested Mixed-Radix Digital Δ-Σ Modulator-Based Divider Controller., , , , , and . IEEE J. Solid State Circuits, 49 (7): 1595-1605 (2014)Mitigation of "Horn Spurs" in a MASH-Based Fractional-N CP-PLL., and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (5): 821-825 (2020)Spurious tones in digital delta-sigma modulators resulting from pseudorandom dither., , and . J. Frankl. Inst., 352 (8): 3325-3344 (2015)Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part II: SQ-DDSM., and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (2): 112-116 (2009)An equation for Generating Chaos and its monolithic Implementation., , and . Int. J. Bifurc. Chaos, 12 (12): 2885-2895 (2002)Hardware Reduction in Digital Delta-Sigma Modulators Via Bus-Splitting and Error Masking - Part I: Constant Input., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (9): 2137-2148 (2011)