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Low-power data encoding/decoding for energy-efficient static random access memory design.

, , , , , and . IET Circuits Devices Syst., 13 (8): 1152-1159 (2019)

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A Dynamic Programming-Based, Path Balancing Technology Mapping Algorithm Targeting Area Minimization., and . ICCAD, page 1-8. ACM, (2019)Low-power data encoding/decoding for energy-efficient static random access memory design., , , , , and . IET Circuits Devices Syst., 13 (8): 1152-1159 (2019)qSeq: Full Algorithmic and Tool Support for Synthesizing Sequential Circuits in Superconducting SFQ Technology., and . DAC, page 133-138. IEEE, (2021)Balanced Factorization and Rewriting Algorithms for Synthesizing Single Flux Quantum Logic Circuits., and . ACM Great Lakes Symposium on VLSI, page 183-188. ACM, (2019)A 256-kb 9T Near-Threshold SRAM With 1k Cells per Bitline and Enhanced Write and Read Operations., and . IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2438-2446 (2015)Hybrid Cell Assignment and Sizing for Power, Area, Delay-Product Optimization of SRAM Arrays., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (12): 2047-2051 (2019)SFQmap: A Technology Mapping Tool for Single Flux Quantum Logic Circuits., , and . CoRR, (2019)kNN-CAM: A k-Nearest Neighbors-based Configurable Approximate Floating Point Multiplier., , , , , and . ISQED, page 1-7. IEEE, (2019)Depth-bounded Graph Partitioning Algorithm and Dual Clocking Method for Realization of Superconducting SFQ Circuits., and . ACM J. Emerg. Technol. Comput. Syst., 17 (1): 2:1-2:22 (2020)DigiQ: A Scalable Digital Controller for Quantum Computers Using SFQ Logic., , , , , , , and . HPCA, page 400-414. IEEE, (2022)