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22.5 dB open-loop gain, 31 kHz GBW pseudo-CMOS based operational amplifier with a-IGZO TFTs on a flexible film.

, , , , , , , , , and . A-SSCC, page 313-316. IEEE, (2014)

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BiCMOS Variable Gain LNA at C-Band with Ultra Low Power Consumption for WLAN., , , , , , and . ICT, volume 3124 of Lecture Notes in Computer Science, page 891-899. Springer, (2004)A 70°phase margin OPAMP with positive feedback in flexible a-IGZO TFT technology., , , , , , , , , and . MWSCAS, page 1-4. IEEE, (2015)A 25-Gb/s 270-mW Time-to-Digital Converter-Based 8× Oversampling Input-Delayed Data-Receiver in 45-nm SOI CMOS., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (11): 3720-3733 (2018)A 0.2-1.3 ns Range Delay-Control Scheme for a 25 Gb/s Data-Receiver Using a Replica Delay-Line-Based Delay-Locked-Loop in 45-nm CMOS., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (5): 806-810 (2020)LUT-based RRAM Model for Neural Accelerator Circuit Simulation., , , , , , , , , and 1 other author(s). NANOARCH, page 35:1-35:6. ACM, (2023)Random and Static Phase Errors in a PLL Array for Millimeter-Wave Frequency Generation., , and . NEWCAS, page 1-5. IEEE, (2023)Baseband amplifiers in a-IGZO TFT technology for flexible audio systems., , , , , , , , , and . ISPACS, page 357-361. IEEE, (2015)A 48 mW 18 Gb/s Delay-Line Based 1: 4 Demultiplexer in 45-nm RFSOI CMOS., , , and . PRIME, page 213-216. IEEE, (2019)A Compact Inductorless 32 GHz Divide-by-2 CML Frequency Divider on 22 nm FD-SOI Technology., , , , and . ICECS, page 314-317. IEEE, (2019)Analysis and Design of a 60 GHz Fully-Differential Frequency Doubler in 130 nm SiGe BiCMOS., , , and . ISCAS, page 1-5. IEEE, (2018)