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An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems., , and . FPL, page 47-53. IEEE, (2007)Profile-guided microarchitectural floor planning for deep submicron processor design., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (7): 1289-1300 (2006)Chameleon: Virtualizing idle acceleration cores of a heterogeneous multicore processor for caching and prefetching., , , and . ACM Trans. Archit. Code Optim., 7 (1): 3:1-3:35 (2010)Chasing Carbon: The Elusive Environmental Footprint of Computing., , , , , , , and . IEEE Micro, 42 (4): 37-47 (2022)Energy-Efficient Network Memory for Ubiquitous Devices., , , , and . IEEE Micro, 23 (5): 60-70 (2003)Region-based caching: an energy-delay efficient memory architecture for embedded processors., and . CASES, page 120-127. ACM, (2000)Information Flow Control in Machine Learning through Modular Model Architecture., , , , , , , , , and . CoRR, (2023)Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (1): 1-13 (2013)SHARK: Architectural support for autonomic protection against stealth by rootkit exploits., and . MICRO, page 106-116. IEEE Computer Society, (2008)Chasing Carbon: The Elusive Environmental Footprint of Computing., , , , , , , and . HPCA, page 854-867. IEEE, (2021)