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CMOS-Compatible Ising Machines built using Bistable Latches Coupled through Ferroelectric Transistor Arrays., , , , , , , , , and 1 other author(s). CoRR, (2022)An Oscillator-based MaxSAT solver., , , , , , , , , and 1 other author(s). CoRR, (2021)COAST: Correlated material assisted STT MRAMs for optimized read operation., , , and . ISLPED, page 1-6. IEEE, (2015)Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (11): 2907-2919 (2017)Quantum Anomalous Hall Effect-Based Variation Robust Binary Content Addressable Memory., , , , , and . MWSCAS, page 331-335. IEEE, (2023)Ternary In-Memory Computing with Cryogenic Quantum Anomalous Hall Effect Memories., , , , , and . ACM Great Lakes Symposium on VLSI, page 521-526. ACM, (2023)Computing with ferroelectric FETs: Devices, models, systems, and applications., , , , , , , , , and 9 other author(s). DATE, page 1289-1298. IEEE, (2018)Cryogenic Memory Technologies., , , and . CoRR, (2021)CMOS-based Single-Cycle In-Memory XOR/XNOR., , , , and . CoRR, (2023)Variation-aware Design Space Exploration of Mott Memristor-based Neuristors., , , , , and . ISVLSI, page 68-73. IEEE, (2022)