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Low delay, error robust wireless video transmission architecture for video communication.

, , and . ICME (1), page 265-268. IEEE Computer Society, (2002)

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Low power full-search block-matching motion estimation chip for H.263+., , , and . ISCAS (4), page 299-302. IEEE, (1999)A novel low-power full-search block-matching motion-estimation design for H.263+., , and . IEEE Trans. Circuits Syst. Video Techn., 11 (7): 890-897 (2001)Analysis and architecture design of variable block-size motion estimation for H.264/AVC., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 53-I (3): 578-593 (2006)Hardware oriented rate control algorithm and implementation for realtime video coding., , , and . ICME, page 421-424. IEEE Computer Society, (2003)Low delay, error robust wireless video transmission architecture for video communication., , and . ICME (1), page 265-268. IEEE Computer Society, (2002)High-Performance JPEG 2000 Encoder With Rate-Distortion Optimization., , , , and . IEEE Trans. Multim., 8 (4): 645-653 (2006)Low-delay and error-robust wireless video transmission for video communications., , and . IEEE Trans. Circuits Syst. Video Techn., 12 (12): 1049-1058 (2002)Novel word-level algorithm of embedded block coding in JPEG 2000., , , , and . ICME, page 137-140. IEEE Computer Society, (2003)Performance analysis of hardware oriented algorithm modification in H.264., , , and . ICME, page 601-604. IEEE Computer Society, (2003)Parallel 4×4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264., , , and . ISCAS (2), page 800-803. IEEE, (2003)