Author of the publication

A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch.

, , , , and . ISCAS, page 1721-1724. IEEE, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A background time-skew calibration technique in flash-assisted time-interleaved SAR ADCs., , , , and . ASICON, page 295-298. IEEE, (2017)A 13-bit non-binary weighted SAR ADC with bridge structure using digital calibration for capacitor weight error., , and . ASICON, page 32-35. IEEE, (2017)A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radio., , , , , and . ISCAS, page 1145-1148. IEEE, (2011)Automatic gain control algorithm with high-speed and double closed-loop in UWB system., , , , and . ASICON, page 1-4. IEEE, (2013)A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic., , , and . APCCAS, page 42-45. IEEE, (2018)A 22-40.5 GHz UWB LNA Design in 0.15um GaAs., , , , and . ASICON, page 1-4. IEEE, (2019)A 4.5-W, 18.5-24.5-GHz GaN Power Amplifier Employing Chebyshev Matching Technique., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (2): 233-242 (February 2023)Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial $V_cm$ -Based Switching., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 1168-1172 (2017)A Monolithic Sub-sampling PLL based 6-18 GHz Frequency Synthesizer for C, X, Ku Band Communication., , , , , and . IEICE Trans. Electron., 98-C (1): 16-27 (2015)A 6.5-mm2 10.5-to-15.5-GHz Differential GaN PA With Coupled-Line-Based Matching Networks Achieving 10-W Peak Psat and 42% PAE., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (11): 4268-4272 (2022)