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Disambiguation of "Silva-Martínez, José"

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A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage.

, , , , and . IEEE J. Solid State Circuits, 52 (3): 657-668 (2017)

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José Luna Martínez

José Martínez Soria

José Martinez

Segundo José Martínez Guzmán

David José Martínez Díaz

 

Other publications of authors with the same name

Bandwidth enhancement of multi-stage amplifiers using active feedback., , and . ISCAS (1), page 609-612. IEEE, (2004)Voltage mode driver for low power transmission of high speed serial AER Links., , , , and . ISCAS, page 2433-2436. IEEE, (2011)Cascode transconductance amplifiers for HF switched-capacitor applications., and . ISCAS (1), page 365-368. IEEE, (2003)A 44.9% PAE digitally-assisted linear power amplifier in 40 nm CMOS., and . A-SSCC, page 349-352. IEEE, (2014)Low-Power Gm-C Filter Employing Current-Reuse Differential Difference Amplifiers., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (6): 635-639 (2017)General Analysis of Feedback DAC's Clock Jitter in Continuous-Time Sigma-Delta Modulators., and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (7): 506-510 (2014)An Injection-Locked Frequency Divider With Multiple Highly Nonlinear Injection Stages and Large Division Ratios., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (4): 313-317 (2007)An On-Chip Loopback Block for RF Transceiver Built-In Test., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (6): 444-448 (2009)A High-Frequency Transconductor Using a Robust Nonlinearity Cancellation., and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (9): 896-900 (2006)Steady-State Analysis of Phase-Locked Loops Using Binary Phase Detector., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (6): 474-478 (2007)