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IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System.

, , , , , , , , , , , , , , , , , , , , и . ASPLOS (3), стр. 545-560. ACM, (2024)

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Hyogmyon Kwon

Jagun Kwon

Youngshin Kwon

Kwangsoo Kwon

Sanghee Kwon

 

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Refresh-Aware Write Recovery Memory Controller., , , , , , и . IEEE Trans. Computers, 66 (4): 688-701 (2017)Mini-batch Serialization: CNN Training with Inter-layer Data Reuse., , , , , и . CoRR, (2018)System Architecture and Software Stack for GDDR6-AiM., , , , , , , , , и 31 other автор(ы). HCS, стр. 1-25. IEEE, (2022)A Distributed Multi-GPU System for Fast Graph Processing., , , , , и . Proc. VLDB Endow., 11 (3): 297-310 (2017)A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application., , , , , , , , , и 27 other автор(ы). IEEE J. Solid State Circuits, 58 (1): 291-302 (2023)Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics., , , , , , и . CoRR, (2023)IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System., , , , , , , , , и 11 other автор(ы). ASPLOS (3), стр. 545-560. ACM, (2024)Rank-Level Parallelism in DRAM., , , , , , и . IEEE Trans. Computers, 66 (7): 1274-1280 (2017)Memory-Centric Computing with SK Hynix's Domain-Specific Memory., , , , , , , , , и 17 other автор(ы). HCS, стр. 1-26. IEEE, (2023)Multiple clone row DRAM: a low latency and area optimized DRAM., , , , , , и . ISCA, стр. 223-234. ACM, (2015)